Originally published in March 2014.
On the Clockv4 page, I mention why these clocks exist. I did not have very good records when I built these clocks, so I don't have source code, nor detailed photos of their construction - actually, not even their schematics, as that was on paper that has long since been lost.
So this page is here simply to show the predecessors to the Clock v4.
The first clock was simply a row of 16 LEDs, controlled by a SBC45EC, and matrixed with two 74HC595 chips. It was told the countdown time, in decimal, via UDP packets sent to it over the network, and counted down in binary.
At the time, our company was split about 50/50 with technical people and not-so-technical people. The not-so-technical people were confused and couldn't read it. My best description was "less LEDs means it's closer to the time". But being that it was effectively exponential, less LEDs didn't happen until right before the time expired...
The first clock. The 74HC595 chips were removed and reused in anothe project.
Clock v2 was meant to fix the major issue with Clockv1: be able to read out normally. It was a 64 x 8 matrix. This clock used the same SBC45EC as clock v1. The matrix was designed in two blocks of 32 x 8, and used six 74HC595 chips.
There were two fatal flaws with this clock design. As it was set up in 32x8 blocks, only one column out of 32 was active at any given time. This means that each LED was only on for about 3% of the time. And, the second flaw was that I used very low light emitting LEDs. So the combination of these two flaws meant that this clock was very dim.
Due to the dimness of the clock, especially in the bright office environment is was meant to be in, work on Clockv3 began immediately after construction was complete.
Software wise, this one had a character generator built in for the purposes of being a countdown clock. It was supplied via the network the the number of seconds to count down to, and it internally did that and displayed it. However, it does not have an onboard RTC, and was decrementing the internal counter on an interupt timer, meaning that over 10 minutes it would be 3-5 seconds out of sync.
The software also allowed sending entire frames of data via UDP to render on the display. The code wasn't very efficient though, and handling network traffic would take it out of action for about 200ms...
Clock v2, front view.
Clock v2, wiring close up.
Clock v2, 595 close up.
Clock v3 was designed to be the definitive clock, based on learnings from the two previous clocks. It was basically the same design as v2, except that it used much brighter LEDs to start off with, had individual blocks of 8x8 LEDs (allowing each column to be active for 12% of the time).
For this one I upgraded to a SBC65EC as well, giving me more RAM to play with - meaning I could buffer 16 screens worth in memory (previously I was limited to 4 screens).
The hardware required much more wiring than the previous one, as I had to fit many more 74595's on the boards. In the end, it became two levels of prototyping board, the bottom being dedicated to 595's, and the top to LEDs.
I also had enough GPIO left over to put some additional 595's in play as a row of multicoloured LEDs at the bottom. These were intended to be used as guages for the countdown progress.
Once construction was complete, I organised a perspex panel to go over the top of the entire system, just to give it a cleaner look. It was not completely clear, which allowed you to see the electronics, and didn't dim the output significantly.
Clock v3, front view.
Clock v3, internal view.
Clock v3, ethernet board.